Inventive concepts relate to a memory system, and more particularly, to a memory module having a data buffer configured to perform, in an internal operation mode of the memory module, internal data (DQ) termination which may increase signal integrity, and/or an operating method of the memory module.
In a field of information processing apparatuses, such as servers, etc., desires for high speed access to high capacity data, such as a database (DB), have been increased, as the big data era has advanced. A bottleneck of an operation capacity of an information processing apparatus dealing with big data, such as a server, etc., is a data loading capability. In order to improve the performance of the information processing apparatus, connecting a high capacity memory to a central processing unit (CPU) memory bus connected to the CPU and having a wide range of processing may be considered.
Flash memories have successfully entered into consumer and enterprise applications by using high performance products. Flash memories having a high data rate are arranged in the CPU memory bus. A nonvolatile dual inline memory module (NVDIMM), in which the flash memory is arranged in the CPU memory bus, has been developed. The NVDIMM has both a high speed processing technique of dynamic random-access memory (DRAM) and a high capacity of the flash memory. The NVDIMM has drawn attention as demands for big data, clouds, artificial intelligence (AI), a high speed network, etc., have increased.